Getting started

Build one board, by hand, start to finish

Twenty-one steps from an empty project to a routed, poured, checked two-layer board and a Gerber set — with a picture for each, and the agent in none of them. This is the editor on its own.

What you are building

The finished bench supply in the three-dimensional viewer, seen at a three-quarter angle: barrel jack, diode, regulator, two electrolytic capacitors, an LED and a two-pin output header on a two-layer board.
Step 18 of 21 — the board you finish with, in the app's own 3D viewer.

A bench supply. A barrel jack in, a Schottky diode for reverse protection, a 78L05 regulator with an electrolytic either side of it, an indicator LED and its resistor, and a two-pin header out. Eight parts, five nets, 70 × 45 mm, two layers — small enough to finish in an evening, and big enough to need every tool this page teaches. It is a thing you can actually build and put on a bench, not a shape to practise on.

Every step below was run against the application before this page was published, and the places where the app disagreed with an earlier version of this page are still in it, marked.

Install

Six builds, all published and all downloadable: macOS on Apple Silicon and Intel, Windows on x64 and ARM64, Linux on x64 and ARM64. The download page carries each one's size and SHA-256.

Two things about those builds that are true and that we would rather say than have you find out. Neither ARM64 build has been launched by anybody — both CI runners are x86_64, so the Windows-on-ARM and Linux-on-ARM packages have been verified as far as their headers and no further. And the Windows installers are not signed, so SmartScreen will put up a "Windows protected your PC" panel; More info → Run anyway is the way past it.

Getting past Gatekeeper on macOS

The macOS build is signed with a real Developer ID but is not notarised — that needs a credential we do not have yet — so the first launch is refused. This is what works today:

  1. Double-click Rivet PCB in Applications. macOS says it cannot verify the developer. Click Done.
  2. Open System Settings → Privacy & Security and scroll to the bottom.
  3. Next to "Rivet PCB was blocked…" click Open Anyway, and confirm.

You do this once. When the build is notarised this section disappears and the app opens on a double-click.

Do not right-click → Open. That was the advice here until this page was checked against what the build actually does, and on macOS 15 and later it no longer works for an unnotarised app — Apple removed that override. The Privacy & Security route above is the one that is left.

And do not run xattr -d com.apple.quarantine on it either. That strips the quarantine flag off whatever you point it at — the exact check you want working the next time something less honest asks you to run it.

The walkthrough

  1. Start a new project. File ▸ New Project, or CtrlN. On a fresh install the app has already built a small example board so the window is not empty on first launch; New Project clears both documents and starts you on an empty schematic with an empty board beside it.

    Rivet PCB after File, New Project: the rail on the far left, the project tree, an empty schematic canvas with its drawing sheet frame, and the floating tool dock at the bottom.
    After File ▸ New Project — the rail, the project tree, an empty sheet and the tool dock.

  2. Open the Symbol Chooser. Press A on the schematic canvas. Type what you want in the search field — a part number like LM78L05, or something generic like resistor. The count under the field says how much of the library matched, out of 22,744 symbols.

    The Choose Symbol dialog with LM78L05 typed into the search field, two matching results listed, and a preview of the regulator symbol on the right.
    The Symbol Chooser, searched for the regulator. Two of 22,744 symbols matched.

  3. Place all eight parts. Pick a result and click on the canvas to drop it. Repeat for the barrel jack (Connector:Barrel_Jack), the Schottky (Device:D_Schottky), two polarised capacitors (Device:C_Polarized), the regulator, a resistor, an LED and a two-pin connector (Connector_Generic:Conn_01x02). R rotates whatever is under the cursor.

    The schematic canvas with eight symbols placed and not yet connected: a barrel jack, a diode, two polarised capacitors, a regulator, a resistor, an LED and a two-pin connector.
    Eight parts down, nothing joined yet. Reference designators are placeholders until step 6.

  4. Wire the power chain. Press W, click the first pin, click the second. Draw the runs a wire says better than a name does: jack to diode, diode to the first capacitor, capacitor to the regulator's input, regulator output to the second capacitor.

    The same schematic with wires drawn between the barrel jack, diode, capacitors and regulator.
    Ten wire segments. The status bar's net count moves as you draw.

  5. Name the rails. Press L and type a name to drop a net label, and use a GND power symbol where every ground return would otherwise cross the sheet. Two pins carrying the same label are connected whether or not a wire joins them — which is what keeps a dense sheet readable.

    The schematic with +5V net labels on the regulator output, the resistor and the header, and ground symbols on every return.
    Labels and ground symbols. Eight nets now, where wiring alone gave two.

  6. Annotate. Tools ▸ Annotate gives every part a reference designator in sheet order — J1, D1, C1, U1, C2, R1, D2, J2 — and numbers the power symbols behind them. Do this before you go to the board: the designator is how the two documents agree on which part is which.

    The schematic after annotation, every symbol carrying a reference designator such as J1, D1, C1, U1, C2, R1, D2 and J2.
    After Tools ▸ Annotate. Every part now has a name the board will recognise.

  7. Read the checker. The schematic's violation count sits in the status bar and is live — it is recomputed every time the document changes.

    An earlier version of this page said "run ERC from the Tools menu". There is no ERC row in the Tools menu and no ERC dialog in the application. Checking is continuous: the count in the status bar is the answer, and it is already current. ERC as a thing you run exists only as a tool the agent can call.

    The schematic status bar showing the symbol count, the net count and a violations count of zero.
    The schematic status bar. Violations, symbols, nets — all live.

  8. Fill in the title block. The drawing sheet's title block is project metadata shared by both documents, edited in Tools ▸ Drawing Sheet Editor. A sheet with an empty title block is not a drawing anybody can file.

    The bottom-right corner of the schematic drawing sheet, its title block filled in with the board name, revision A, the date and a description of the stackup.
    The title block, bottom right of the sheet. It appears on the board's frame too.

  9. Carry the design across. Tools ▸ Update Board from Schematic… brings the parts over as footprints with their connections as ratsnest lines.

    Switch to the Board first. That menu row is enabled only while the board is the document on screen — from the schematic it is greyed out, which is where a reader following this page in order was standing when an earlier version told them to use it. Click Board in the title row, then open the menu.

    The Tools menu open, showing Update Board from Schematic, Annotate, the editor rows, and the export rows including Export Gerbers and Drill and Batch Export.
    The Tools menu. On Windows and Linux it is in the window; on macOS the same menus are in the system menu bar.

  10. Give every part a footprint. On the board, A opens the Footprint Chooser — the same search over 15,124 footprints, with a 2D preview and a 3D preview of the part. A through-hole barrel jack, a DO-41 diode, two radial electrolytics, a TO-92 regulator, and 0805 chips for the resistor and LED.

    The board editor with eight footprints placed and not yet routed, their pads and courtyards drawn, ratsnest lines showing which pads belong together.
    Eight footprints on the board. Nothing is routed yet.

  11. Draw the board outline. The outline tool draws on Edge.Cuts, and that layer is what the fab mills to. Four lines make a rectangle; 70 × 45 mm here.

    Draw the outline as lines, not as a circle, unless you mean a round board. A closed Edge.Cuts circle is treated as the board's own outline and every pour is clipped to it — which is how a board can end up with two pours and no copper in either.

    The board with a rectangular yellow Edge.Cuts outline drawn around the eight footprints.
    The milled edge. Everything else has to live inside it.

  12. Tell the copper which net each pad is on. Carrying the schematic across does this for you; doing it by hand is how you fix the one pad that did not come over. VIN, VRAW, +5V, LED_A and GND — five nets across seventeen pads.

    The board with net names shown on the pads, the ratsnest lines now grouped by net.
    Pads carrying net names. The ratsnest is drawn from these, and so is DRC.

  13. Route the copper. X starts a track. Click the first pad, click the next; the router walks around what is already there and shoves what it can. Take each net as one path rather than fanning three tracks off one pad.

    Two things the board will complain about if you get them wrong, and both are worth knowing before you draw rather than after. A square corner is reported as a sharp bend — the check fires below 90°, and a right angle is exactly on the line; leave along one axis, cut the corner at 45° and arrive on the other. And a track laid with no net belongs to no net, so it will read as shorting whatever it passes: start the route on a pad and the net comes with it.

    The board with fourteen copper tracks routed on the front layer between the pads, every corner cut at forty-five degrees.
    Fourteen segments on F.Cu. Ground is not routed — the pour will carry it.

  14. Drop a via. V places one. A via is only real if copper reaches it, so this one sits at the end of a short run off the regulator's ground pad and takes GND down to the back layer, where the pour is about to be.

    A single plated via placed on the ground net at the end of a short front-layer track from the regulator's ground pad.
    One 0.8 mm via, on GND, stitching front to back.

  15. Draw a pour. Z draws a copper zone. The dialog asks for the layer and the net before you draw, which is the point: a pour bonded to nothing looks exactly like a pour bonded to ground. B.Cu, net GND, inset half a millimetre from the edge.

    The board with an unfilled zone outline drawn on the back copper layer, just inside the board edge.
    The zone outline. Drawn, but not yet filled — an outline is not copper.

  16. Fill it. B, or the Fill All Zones button, computes the fill: copper everywhere inside the outline except where clearance, another net or a drilled hole says otherwise, with thermal spokes joining the pads that are on the pour's net.

    The board after filling: solid back-layer copper across the whole board with clearance voids around every track, pad and via not on the ground net.
    Filled. The voids around the front-layer copper are the clearance being honoured.

  17. Read the board's violations. The Violations tab in the properties dock lists what the board thinks is wrong, positioned in millimetres; click one to jump to it. Like the schematic's, it is live.

    An earlier version of this page said "run DRC before you call it done". There is no Run DRC. The check is recomputed with the board on every read, so the count in the status bar and the list in the dock are always current — there is no stale green to be fooled by, and nothing to remember to press.

    The board editor with the Violations tab selected in the properties dock, listing the design-rule violations found on the board with their positions in millimetres.
    The Violations tab. Every entry carries the millimetre position of the thing it is about.

  18. Look at it. 3D in the title row builds the board in three dimensions from the same document — substrate, copper, mask, silkscreen and the component models that came with the footprints. It is the fastest way to notice that a part is facing the wrong way.

    The finished board in the three-dimensional viewer, seen at a three-quarter angle, with all eight component models in place.
    Eight footprints, eight models. The status line under the viewport counts what it built.

  19. Export Gerbers and drill. Tools ▸ Export Gerbers and Drill writes one file per layer plus the Excellon drill file into a numbered folder beside the project. That row, like Update Board, needs the board on screen.

  20. Or run the whole output set at once. Tools ▸ Batch Export… runs every output you tick into one directory: the Gerber package, the drill file, SVG, PDF, PS and DXF plots, the BOM, and STEP and VRML for mechanical CAD.

    The Batch Export dialog listing nine output jobs with checkboxes: the Gerber package, Excellon drill, four plot formats, a BOM, and STEP and VRML.
    Nine jobs, one output directory, one Run.

  21. Save. CtrlS saves both documents and the project. CtrlShiftS saves a copy under a new name. That is the whole board.

    The finished board seen from directly above in the three-dimensional viewer, showing the green mask, white silkscreen and the component models.
    Done — the board from above, and the same file set a fab would receive.

The agent, if you want it

Nothing above used it. The panel behind the Agent tab on the left rail is a faster way to the same edits, not a different product, and it is the one place in the app that can make an outbound request. It offers three ways in, and the app works before you pick any of them: Watch it build a board runs a worked example against your own document with no account, no key and no network; Sign in opens your browser at the account page; Use my own key takes any OpenAI-compatible endpoint, including one running on your own machine, which makes no outbound request at all.

The agent panel open on its first screen, offering Watch it build a board, Sign in and Use my own key, with three example prompts underneath.
The agent panel. Close it and the editors are complete without it.

What it can and cannot do on its own, and how one undo takes a whole turn back, is in The agent.

Where to go next

For the export step in full — Gerber, drill, STEP, VRML, a BOM — see Export & fabrication. For the schematic editor's own reference, Schematic; for the board editor's, Board layout. For the full key list, see Keyboard shortcuts.